I-LCMXO2-256HC-4TG100C Eyoqobo kwaye iNtsha eneXabiso loKhuphiswano kwi-Stock IC Supplier

Nangona zombiniFPGAkwayeI-CPLDzizixhobo ze-ASIC ezicwangcisiweyo kwaye zineempawu ezininzi eziqhelekileyo, ngenxa yomahluko kwisakhiwo se-CPLD kunye ne-FPGA, zineempawu zazo:

I-1.CPLD ifaneleke ngakumbi ukugqiba i-algorithms eyahlukeneyo kunye nengqiqo yokudibanisa, kwaye i-FP GA ifaneleka ngakumbi ukugqiba i-logic elandelelanayo.Ngamanye amazwi, i-FPGA ifaneleke ngakumbi kwisakhiwo esityebileyo se-flip-flop, ngelixa i-CPLD ifaneleka ngakumbi kwi-flip-flop elinganiselwe kunye nesakhiwo esityebileyo sexesha lemveliso.

I-2.Isakhiwo esiqhubekayo somzila we-CPLD sinquma ukuba ukulibaziseka kwexesha kufana kwaye kuyaqikelelwa, ngelixa i-segmented structure ye-FPGA inquma ukulibaziseka kwayo ukungaqiniseki.

I-3.FPGA ine-flexibility ngakumbi kune-CPLD kwiprogram.I-CPLD icwangciswe ngokuguqula umsebenzi wengqiqo kunye nesiphaluka esisisigxina soqhagamshelwano lwangaphakathi, ngelixa i-FPGA icwangciswe ngokuguqula i-wiring yoxhumo lwangaphakathi.I-FP GA inokucwangciswa phantsi kwesango lengqiqo, ngelixa i-CPLD icwangciswe phantsi kwebhloko yengqiqo.

I-4.Ukudityaniswa kwe-FPGA kuphezulu kune-CPLD, kwaye inokwakheka kwee-wiring eziyinkimbinkimbi kunye nokuphunyezwa kwengqiqo.

I-5.CPLD isebenziseka ngakumbi kune-FPGA.Inkqubo ye-CPLD usebenzisa i-E2PROM okanye iteknoloji ye-FASTFLASH, akukho memori yangaphandle yememori, kulula ukuyisebenzisa.Nangona kunjalo, ulwazi lwenkqubo yeFPGA kufuneka lugcinwe kwimemori yangaphandle, kwaye indlela yokusetyenziswa inzima.

6. I-CPLDS ikhawuleza kune-FPgas kwaye inoqikelelo olukhulu lwexesha.Oku kungenxa yokuba i-FPGas yinkqubo yomgangatho wesango kwaye uqhagamshelo olusasaziweyo lwamkelwa phakathi kwe-CLBS, ngelixa i-CPLDS iyinkqubo yebhloko ye-logic yenqanaba kwaye uqhagamshelo phakathi kweebhloko zabo ze-logic zinyibilikile.

7.Ngendlela yokucwangcisa, i-CPLD isekelwe ikakhulu kwi-E2PROM okanye kwi-Flash memory programming, amaxesha eprogram ukuya kumaxesha angama-10,000, inzuzo kukuba inkqubo yokucima ulwazi lwenkqubo ayilahlekanga.I-CPLD inokwahlulwa ibe ziindidi ezimbini: udweliso lwenkqubo kumdwelisi wenkqubo kunye nenkqubo kwinkqubo.Uninzi lweFPGA lusekwe kwiprogram ye-SRAM, ulwazi lwenkqubo lulahlekile xa inkqubo icinyiwe, kwaye idatha yenkqubo kufuneka ibhalwe kwakhona kwi-SRAM ukusuka ngaphandle kwesixhobo rhoqo xa iqhutywa.Inzuzo yayo kukuba inokucwangciswa nangaliphi na ixesha, kwaye inokucwangciswa ngokukhawuleza emsebenzini, ukuze kuphunyezwe ukucwangciswa okuguquguqukayo kwinqanaba lebhodi kunye nenqanaba lenkqubo.

8.Imfihlo ye-CPLD ilungile, imfihlo yeFPGA imbi.

I-9. Ngokubanzi, ukusetyenziswa kwamandla e-CPLD kukhulu kune-FPGA, kwaye i-degree ephezulu yokudibanisa, ibonakala ngakumbi.