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iimveliso

LM46002AQPWPRQ1 Iphakheji HTSSOP16 edityanisiweyo yesekethe IC itshiphu entsha indawo yamacandelo ombane

inkcazelo emfutshane:


Iinkcukacha zeMveliso

Iithegi zeMveliso

Iimpawu zeMveliso

UHLOBO INKCAZO
Udidi IiSekethe eziDityanisiweyo (ICs)

Ulawulo lwamandla (PMIC)

I-Voltage Regulators-DC DC Switching Regulators

Mfr Texas Instruments
Uthotho Iimoto, AEC-Q100, SIMPLE SWITCHER®
Iphakheji Iteyiphu & neReel (TR)

Sika iTape (CT)

Digi-Reel®

SPQ 2000T&R
Ubume beMveliso Iyasebenza
Umsebenzi Yehla
Uqwalaselo Lwemveliso Okuhle
I-Topology Buck
Uhlobo Lwemveliso Iyahlengahlengiswa
Inani leZiphumo 1
I-Voltage-Igalelo (uMzu) 3.5V
I-Voltage-Input (Ubukhulu) 60V
Voltage-Imveliso (Min/Fixed) 1V
Voltage-Imveliso (Ubukhulu) 28V
Okwangoku -Isiphumo 2A
Ukuphindaphinda-Ukutshintsha 200kHz ~ 2.2MHz
Ungqamaniso loLungisanisi Ewe
Ubushushu bokusebenza -40°C ~ 125°C (TJ)
Uhlobo lokuNqamisa INtaba engaphezulu
Ipakethe / Ityala I-16-TSSOP (0.173", 4.40mm Ububanzi) I-Pad eveziweyo
Supplier Device Package 16-HTSSOP
Inombolo yeMveliso esisiseko LM46002

 

Inkqubo yokuvelisa iChip

Inkqubo yokwenziwa kwetshiphu epheleleyo ibandakanya uyilo lwetshiphu, imveliso yewafer, ukupakishwa kwetshiphu, kunye novavanyo lwetshiphu, phakathi kwayo inkqubo yokuvelisa iwafer intsonkothile ngakumbi.

Inyathelo lokuqala luyilo lwetshiphu, olusekwe kwiimfuno zoyilo, njengeenjongo ezisebenzayo, iinkcukacha, ubume besekethe, ukujika kocingo kunye neenkcukacha, njl. njl. "Imizobo yoyilo" iyenziwa;ii-photomasks ziveliswa kwangaphambili ngokwemigaqo ye-chip.

②.Ukuveliswa kwe-wafer.

1. Iziqwenga ze-silicon zisikwa ukuya kubukhulu obufunekayo usebenzisa i-wafer slicer.Okukhona i-wafer ibhityile, kokukhona isezantsi ixabiso lemveliso, kodwa kokukhona inkqubo ifuna ngamandla.

2. ukugquma umphezulu we-wafer ngefilimu ye-photoresist, ephucula ukuxhathisa kwe-wafer kwi-oxidation kunye nobushushu.

3. Uphuhliso lwe-wafer photolithography kunye ne-etching isebenzisa iikhemikhali ezibuthathaka kukukhanya kwe-UV, oko kukuthi, ziba thambileyo xa zibekwe kukukhanya kwe-UV.Ubume be-chip bunokufumaneka ngokulawula indawo ye-mask.I-photoresist isetyenziswa kwi-silicon wafer ukuze inyibilike xa ivezwe kukukhanya kwe-UV.Oku kwenziwa ngokufaka inxalenye yokuqala yesigqubuthelo sobuso ukuze indawo evezwe kukukhanya kwe-UV inyibilikiswe kwaye le ndawo inyibilikisiweyo inokuhlanjwa ngesinyibilikisi.Le ndawo inyibilikisiwe inokuhlanjwa nge-solvent.Inxalenye eseleyo ke imile njengefotoresist, isinika umaleko wesilika ofunekayo.

4. Isitofu seeyoni.Ukusebenzisa umatshini wokudibanisa, i-N kunye ne-P trap zifakwe kwi-silicon engenanto, kunye ne-ion ijojowe ukwenza i-PN junction (isango le-logic);umaleko wesinyithi ongasentla udityaniswa kwisekethe ngekhemikhali kunye nemvula yemozulu ebonakalayo.

5. Uvavanyo lwe-wafer Emva kwezi nkqubo zingentla, i-lattice yedayisi yenziwa kwi-wafer.Iimpawu zombane zombane ngamnye zivavanywa ngokusebenzisa uvavanyo lwe-pin.

③.Ukupakishwa kwe-chip

I-wafer egqityiweyo ilungisiwe, ibotshelelwe kwizikhonkwane, kwaye yenziwe kwiiphakheji ezahlukeneyo ngokwemfuno.Imizekelo: DIP, QFP, PLCC, QFN, njalo njalo.Oku kumiselwa ikakhulu yimikhwa yesicelo somsebenzisi, indawo yesicelo, imeko yemarike, kunye nezinye izinto ezijikelezayo.

④.Uvavanyo lwetshiphu

Inkqubo yokugqibela yokwenziwa kwe-chip igqityiwe uvavanyo lwemveliso, olunokwahlulwa lube luvavanyo ngokubanzi kunye novavanyo olukhethekileyo, eyokuqala kukuvavanya iimpawu zombane zetshiphu emva kokupakishwa kwiindawo ezahlukeneyo, ezifana nokusetyenziswa kwamandla, isantya sokusebenza, ukumelana nombane, njl. Emva kokuvavanya, ii-chips zihlelwa ngamabakala ahlukeneyo ngokweempawu zabo zombane.Uvavanyo olukhethekileyo lusekelwe kwiiparitha zobugcisa zeemfuno ezikhethekileyo zomthengi, kwaye ezinye iitshiphusi ezivela kwiinkcukacha ezifanayo kunye neentlobo zivavanywa ukuze zibone ukuba ziyakwazi ukuhlangabezana neemfuno ezikhethekileyo zomthengi, ukugqiba ukuba iitshiphusi ezikhethekileyo kufuneka zenzelwe umthengi.Iimveliso eziphumelele uvavanyo oluqhelekileyo zibhalwe ngeenkcukacha, iinombolo zemodeli, kunye neentsuku zefektri kwaye zipakishwe ngaphambi kokushiya umzi-mveliso.Iichips ezingaluphumelelanga uvavanyo zihlelwa njengezithotyiweyo okanye zaliwe ngokuxhomekeke kwiparamitha ezizifumeneyo.


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