10AX115H2F34E2SG FPGA Arria® 10 GX Family 1150000 Iiseli 20nm Technology 0.9V 1152-Pin FC-FBGA

inkcazelo emfutshane:

I-10AX115H2F34E2SG usapho lwesixhobo luquka ukusebenza okuphezulu kunye namandla asebenzayo angama-20 nm phakathi koluhlu lweFPGA kunye nee-SoCs.

Ukusebenza okuphezulu kunesizukulwana sangaphambili somgangatho ophakathi kunye nomgangatho ophezulu
IiFPGAs

Thumela i-imeyile kuthi Khuphela i-Datesheet

Iinkcukacha zeMveliso

Iithegi zeMveliso

Product Specifications Technical

I-EU RoHS	Ukuthobela
I-ECCN (US)	3A991
Ubume benxalenye	Iyasebenza
HTS	8542.39.00.01
SVHC	Ewe
I-SVHC Igqithise Umda	Ewe
Iimoto	No
I-PPAP	No
Igama losapho	Arria® 10 GX
Inkqubo yeTekhnoloji	20nm
Umsebenzisi I/Os	504
Inani leerejista	1708800
Umbane woBonelelo oluSebenzayo (V)	0.9
Iingongoma eziNgqiqo	1150000
Inani leZiphindaphindo	3036 (18x19)
Uhlobo lweMemori yeNkqubo	SRAM
Inkumbulo Enzinzisiweyo (Kbit)	54260
Inani elipheleleyo leBlock RAM	2713
Ii-EMACs	3
IiYunithi zokuQiniseka kweSixhobo	1150000
Inombolo yeDivaysi yee-DLLs/PLLs	32
Imijelo yeTransceiver	96
Isantya seTransceiver (Gbps)	17.4
I-DSP ezinikeleyo	1518
PCIe	4
Ukucwangcisa	Ewe
Inkxaso yokuhlengahlengiswa	Ewe
Khuphela Khusela	Ewe
I-In-System Programmability	Ewe
Ibanga lesantya	2
Imigangatho ye-I/O enesiphelo esinye	LVTTL\|LVCMOS
Ujongano Lwenkumbulo Yangaphandle	DDR3 SDRAM\|DDR4\|LPDDR3\|RLDRAM II\|RLDRAM III\|QDRII+SRAM
Ubuncinci bombane wokuSebenza (V)	0.87
Eyona Voltage yoBonelelo oluPhezulu (V)	0.93
I/O Voltage (V)	1.2\|1.25\|1.35\|1.5\|1.8\|2.5\|3
Ubuncinci boBubushushu bokusebenza (°C)	0
Obona bushushu bokusebenza (°C)	100
Supplier Ibanga lobushushu	Yandisiwe
Igama lorhwebo	Arria
Ukunyuka	INtaba engaphezulu
Iphakheji Height	2.95
Ububanzi bePakethi	35
Ubude bePakethi	35
PCB itshintshile	1152
Igama lePhakeji eliMgangatho	BGA
Supplier Package	FC-FBGA
Pin Bala	1152
Imilo yokukhokela	Ibhola

Umahluko kunye nobudlelwane phakathi kweFPGA kunye ne-CPLD

1. Inkcazo yeFPGA kunye neempawu

FPGAyamkela ingqikelelo entsha ebizwa ngokuba yi-Logic Cell Array (LCA) kunye neBloko yokuQiniseka eQinisekayo (CLB) kunye neSiphumo seNgeniso (IOB) iBloko kunye noQhagamshelwano.Imodyuli yengqiqo eqwalaselweyo yiyunithi esisiseko ukuqonda umsebenzi womsebenzisi, oqhele ukucwangciswa kwi-array kwaye usasaze i-chip yonke.Imodyuli yegalelo-yemveliso IOB igqibezela ujongano phakathi kwe logic kwi chip kunye ne pin yepakethe yangaphandle, kwaye ngokuqhelekileyo icwangciswe malunga ne-chip array.Iingcingo zangaphakathi zibandakanya ubude obahlukeneyo bamacandelo ocingo kunye nokutshintsha koqhagamshelo olucwangcisiweyo, oludibanisa iibhloko ezahlukeneyo ezicwangcisekileyo okanye iibhloko ze-I/O ukwenza isekethe enomsebenzi othile.

Iimpawu ezisisiseko zeFPGA zezi:

Ukusebenzisa i-FPGA ukuyila isiphaluka se-ASIC, abasebenzisi abafuni ukuvelisa iprojekthi, banokufumana i-chip efanelekileyo;
I-FPGA ingasetyenziswa njengesampulu yokulinga yezinye ezilungiselelwe ngokupheleleyo okanye ezenziwe ngokwe-semi-customizedIisekethe ze-ASIC;
Kukho izinto ezininzi ezibangelayo kunye nezikhonkwane ze-I/O kwiFPGA;
I-FPGA yenye yezixhobo ezinomjikelezo omfutshane woyilo, ixabiso eliphantsi lophuhliso kunye nomngcipheko ophantsi kwisekethe ye-ASIC.
I-FPGA ithatha inkqubo ye-CHMOS enesantya esiphezulu, ukusetyenziswa kwamandla aphantsi, kwaye inokuhambelana namanqanaba e-CMOS kunye ne-TTL.

I-2, inkcazo ye-CPLD kunye neempawu

I-CPLDubukhulu becala iqulunqwe ngenkqubo ye-Logic Macro Cell (LMC) ejikeleze umbindi weyunithi ye-matrix yoqhagamshelo olucwangcisekileyo, apho ulwakhiwo lwengqiqo ye-LMC luntsonkothe ngakumbi, kwaye lunolwakhiwo oluntsonkothileyo lweyunithi ye-I/O, inokuveliswa ngumsebenzisi ngokutsho iimfuno zesakhiwo sesekethe ethile, ukugqiba imisebenzi ethile.Ngenxa yokuba iibhloko ze-logic zidityaniswe kunye neengcingo zetsimbi ezisisigxina kwi-CPLD, isekethe ye-logic eyilwe inoqikelelo lwexesha kwaye inqanda ukungonakali kokuqikelela okungaphelelanga kwexesha le-segmented interconnect structure.Ngeminyaka yoo-1990, i-CPLD yakhula ngokukhawuleza, kungekuphela nje ngeempawu zokucima umbane, kodwa kunye neempawu eziphambili ezifana nokuskena komphetho kunye nenkqubo ye-intanethi.

Iimpawu zenkqubo ye-CPLD zezi zilandelayo:

Izixhobo ezinengqondo kunye neememori zininzi (iCypress De1ta 39K200 ingaphezulu kwe-480 Kb ye-RAM);
Imodeli yexesha eliguquguqukayo kunye nezixhobo ezingafunekiyo zendlela;
Iguquguqukayo ukutshintsha imveliso yephini;
Ingafakelwa kwisixokelelwano kwaye icwangciswe ngokutsha;
Inani elikhulu leeyunithi ze-I/O;

3. Umahluko kunye noqhagamshelwano phakathi kweFPGA kunye ne-CPLD

I-CPLD sisishunqulelo sesixhobo esintsonkothileyo esicwangcisiweyo, iFPGA sisishunqulelo soluhlu lwesango olucwangcisekileyo, umsebenzi wezi zinto zimbini uyafana, kodwa umgaqo-siseko wophumezo wahluke kancinane, ngoko ngamanye amaxesha sinokungawuhoyi umahluko phakathi kwezi zimbini, ngokudibeneyo. ekubhekiselwa kuyo njengesixhobo sokucwangcisa esicwangcisekileyo okanye iCPLD/FPGA.Kukho iinkampani ezininzi ezivelisa i-CPLD/FPGas, ezona zintathu zikhulu yi-ALTERA,XILINX, kunye ne-LAT-TICE.I-CPLD i-decomposition combinatorial logic function yomelele kakhulu, iyunithi enkulu inokubolisa ishumi elinesibini okanye nangaphezulu kwe-20-30 igalelo lengqiqo yokudibanisa.Nangona kunjalo, i-LUT ye-FPGA inokuphatha kuphela ingqiqo edibeneyo yamagalelo e-4, ngoko ke i-CPLD ifanelekile ukuyila ingqiqo edibeneyo edibeneyo efana ne-decoding.Nangona kunjalo, inkqubo yokwenziwa kweFPGA imisela ukuba inani le-LUTs kunye nezixhokonxa eziqulethwe kwichip yeFPGA likhulu kakhulu, ngokufuthi amawaka amawaka,iCPLD inokufezekisa kuphela iiyunithi ezinengqondo ezingama-512, kwaye ukuba ixabiso letshiphu lahlulwe ngenani lengqiqo. iiyunithi, i-avareji yexabiso leyunithi ye-FPGA isezantsi kakhulu kune-CPLD.Ke ukuba inani elikhulu lezinto ezibangelayo zisetyenziswa kuyilo, njengokuyila ingqiqo yexesha elinzima, ngoko ukusebenzisa iFPGA lukhetho olulungileyo.

Nangona zombini i-FPGA kunye ne-CPLD zizixhobo ze-ASIC ezicwangcisekileyo kwaye zineempawu ezininzi ezifanayo, ngenxa yomahluko kulwakhiwo lwe-CPLD kunye neFPGA, zineempawu zazo:

I-CPLD ifaneleke ngakumbi ukugqiba ii-algorithms ezahlukeneyo kunye nengqiqo yokudibanisa, kwaye i-FPGA ifaneleke ngakumbi ukugqiba ingqiqo elandelelanayo.Ngamanye amazwi, i-FPGA ifaneleke ngakumbi kwisakhiwo esityebileyo se-flip-flop, ngelixa i-CPLD ifaneleka ngakumbi kwi-flip-flop elinganiselwe kunye nesakhiwo esityebileyo sexesha lemveliso.
Ulwakhiwo oluqhubekayo lwe-CPLD lumisela ukuba ukulibaziseka kwexesha kufana kwaye kuyaqikelelwa, ngelixa ulwakhiwo olucandiweyo lwe-FPGA lugqiba ukuba ukulibaziseka kwayo akunakwenzeka.
I-FPGA inokuguquguquka ngakumbi kune-CPLD kucwangciso.
I-CPLD icwangciswe ngokuguqula umsebenzi wengqiqo wesekethe yangaphakathi esisigxina, ngelixa i-FPGA icwangciswe ngokutshintsha i-wiring yoxhumo lwangaphakathi.
I-Fpgas inokucwangciswa phantsi kwamasango engqiqo, ngelixa i-CPLDS icwangciswe phantsi kweebhloko zengqiqo.
I-FPGA idityaniswe ngakumbi kune-CPLD kwaye inokwakheka kweengcingo ezintsonkothileyo kunye nokuphunyezwa okusengqiqweni.

Ngokubanzi, ukusetyenziswa kwamandla e-CPLD kukhulu kune-FPGA, kwaye idigri yokudibanisa iphezulu, ibonakala ngakumbi.

Ngaphambili: XCVU9P-2FLGB2104I FPGA,VIRTEX ULTRASCALE,FCBGA-2104

Okulandelayo: XC7VX690T-2FFG1927I entsha kunye neyoqobo ene-FPGA yesitokhwe

Bhala umyalezo wakho apha kwaye uwuthumele kuthi